tfaour
ca0ca9d015
FRAME_BATTERY_ADC_GPIO was still at its off-by-default -1 in sdkconfig.xiao despite the XIAO being the one board this was designed for -- the status panel showed no battery line because the device never sent a report at all. Sets it to GPIO0, matching the settled shared-with-back-button design.
33 lines
1.6 KiB
Plaintext
33 lines
1.6 KiB
Plaintext
# Board-specific overrides for the Seeed XIAO ESP32-C6, layered on top
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# of sdkconfig.defaults (which targets the 8MB ESP32-C6-DevKitC-1 dev
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# board) via SDKCONFIG_DEFAULTS -- see build_for_board.sh, which is the
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# supported way to build with this file. Don't set this via a plain
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# `idf.py menuconfig` on the default build; that writes straight into
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# the shared sdkconfig, not this file.
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CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y
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CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions_xiao.csv"
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CONFIG_PARTITION_TABLE_FILENAME="partitions_xiao.csv"
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# Powers the XIAO's RF switch and selects its onboard antenna -- without
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# this the softAP/STA radio doesn't reliably reach the antenna at all.
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# See the Kconfig help text (FRAME_XIAO_ANTENNA_INIT) for why.
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CONFIG_FRAME_XIAO_ANTENNA_INIT=y
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# EPD wiring: the dev-board defaults (DC=9, RST=10, BUSY=11) aren't
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# physically exposed on the XIAO -- only GPIO 0,1,2,16,17,18,19,20,21,
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# 22,23 are broken out, and 18/19/20 are already the panel's SPI pins
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# (CS/MOSI/CLK) while 0/1/2 are the buttons. Remapped to three of the
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# remaining free pins; see docs/hardware.md for the full XIAO wiring
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# table.
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CONFIG_EPD_PIN_DC=16
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CONFIG_EPD_PIN_RST=17
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CONFIG_EPD_PIN_BUSY=21
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# Battery reporting: shares GPIO0/D0/A0 with the back button (a
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# high-impedance divider coexists fine with the button's pull-up and
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# deep-sleep wake -- the firmware time-shares the pin). Requires the
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# 2x200k divider from BAT+ to GND, midpoint to this pin, described in
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# docs/hardware.md. Off by default project-wide since most builds (the
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# DevKitC-1 dev board) have no battery wired at all.
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CONFIG_FRAME_BATTERY_ADC_GPIO=0
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