tfaour
474b92a282
Server: Frame.panel_type (new column + migration) is auto-derived from the device's reported board (X-Frame-Board), never user-set -- the panel is a property of the hardware, not a picker in the UI. image_pipeline's packing/render pipeline is parameterized by panel geometry instead of hardcoded 800x480 globals, with the real confirmed 13.3in geometry (1600x1200) registered alongside the original 7.3in panel. Existing 7.3in frames are unaffected (column default + board mapping both resolve to the original panel). Board identifiers are also renamed (devkit/xiao -> devkit_esp32c6/ xiao_esp32c6, plus new "ee02") since the EE02 board also carries a XIAO module -- "xiao" alone stopped disambiguating hardware. The server keeps accepting the legacy bare names indefinitely for already-flashed devices. Firmware: scaffolds a third build target (ee02, ESP32-S3 -- a real chip-target change, not just a same-chip Kconfig variant like xiao) and a new epd13in3e driver component skeleton. The actual panel init/LUT/ refresh register sequence isn't ported from vendor demo code yet (none was available), so that component deliberately fails to compile (#error) rather than risk sending unverified register values to real hardware -- devkit/xiao are unaffected and build identically to before. CI's ee02 build step is continue-on-error for the same reason.
213 lines
11 KiB
Markdown
213 lines
11 KiB
Markdown
# Hardware
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## Parts
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- An ESP32-C6 dev board (e.g. ESP32-C6-DevKitC-1). Needs 8MB flash --
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see [`firmware/sdkconfig.defaults`](../firmware/sdkconfig.defaults) and
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[`firmware/partitions.csv`](../firmware/partitions.csv) if yours differs.
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- [Waveshare 7.3" E Ink Spectra 6 (E6) panel](https://www.waveshare.com/7.3inch-e-paper-hat-e.htm) --
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800x480, 6-color, SPI.
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- A USB cable for flashing/power.
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## Wiring
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The panel connects over SPI plus three control lines (data/command, reset,
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busy). Defaults below match the reference build and are set in
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[`firmware/components/epd7in3e/Kconfig`](../firmware/components/epd7in3e/Kconfig) --
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override via `idf.py menuconfig` under **E-Paper Display (epd7in3e)
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Configuration** if your wiring differs.
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| Panel pin | ESP32-C6 GPIO | Kconfig option |
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| --------- | ------------- | ----------------- |
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| CLK | 20 | `EPD_PIN_CLK` |
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| DIN | 19 | `EPD_PIN_MOSI` |
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| CS | 18 | `EPD_PIN_CS` |
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| DC | 9 | `EPD_PIN_DC` |
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| RST | 10 | `EPD_PIN_RST` |
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| BUSY | 11 | `EPD_PIN_BUSY` |
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| VCC | 3.3V | -- |
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| GND | GND | -- |
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Optionally, three buttons, all wired the same way -- momentary push button
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between the GPIO and GND, no external resistor needed (the firmware
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enables each pin's internal pull-up, so it idles high and reads low when
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pressed):
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- **Next photo (GPIO2)**: a normal press skips immediately to the next
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photo; see
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[`firmware/README.md`](../firmware/README.md#skipping-to-the-next-photo).
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- **Back photo (GPIO0)**: a normal press returns to the previously-shown
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photo; see
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[`firmware/README.md`](../firmware/README.md#going-back-to-the-previous-photo).
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- **Menu / reset (GPIO1)**: one button, three actions by hold duration --
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a quick press soft-resets the device (config kept); holding ~3s then
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releasing overlays a "scan to manage" QR code on the current photo for
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30 seconds; holding ~15s factory-resets it (clears WiFi/server config,
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reprovisions); see
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[`firmware/README.md`](../firmware/README.md#managing-the-queue-soft-resetting-and-factory-resetting).
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All three pins were picked because they're within GPIO 0-7 -- the only
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pins the ESP32-C6 can wake from deep sleep on -- aren't strapping pins,
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and aren't already used by the panel wiring above. Also, not
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incidentally, GPIO 0-7 is *all* the deep-sleep-wakeup-capable pins this
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chip has (`SOC_RTCIO_PIN_COUNT` is 8) -- worth knowing if you're
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targeting a compact board like the Seeed XIAO ESP32-C6, which only
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breaks out 3 of them (GPIO0/1/2). These three buttons were deliberately
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designed to fit exactly that budget: two dedicated pins for the
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actions where instant, unambiguous response matters most (next, back),
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and everything else folded onto the third pin via hold duration instead
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of needing its own pin.
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### Wiring on the Seeed XIAO ESP32-C6
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The XIAO only breaks out 11 GPIOs (0, 1, 2, 16, 17, 18, 19, 20, 21, 22,
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23), so the dev-board defaults above don't fit -- DC/RST/BUSY (GPIO 9,
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10, 11) aren't exposed on this board at all. Built with
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[`build_for_board.sh xiao`](../firmware/README.md#building-for-the-seeed-xiao-esp32-c6-production-board),
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which layers [`firmware/sdkconfig.xiao`](../firmware/sdkconfig.xiao) on
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top of the dev-board defaults, remapping DC/RST/BUSY onto three of the
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remaining free pins:
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| Panel pin | XIAO GPIO | XIAO silkscreen label | Kconfig option |
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| --------- | --------- | ---------------------- | --------------- |
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| CLK | 20 | D9 | `EPD_PIN_CLK` (unchanged) |
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| DIN | 19 | D8 | `EPD_PIN_MOSI` (unchanged) |
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| CS | 18 | D10 | `EPD_PIN_CS` (unchanged) |
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| DC | 16 | D6 | `EPD_PIN_DC` |
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| RST | 17 | D7 | `EPD_PIN_RST` |
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| BUSY | 21 | D3 | `EPD_PIN_BUSY` |
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| VCC | 3.3V | 3V3 | -- |
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| GND | GND | GND | -- |
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The XIAO's silkscreen labels its pins D0-D10, not raw GPIO numbers --
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the table above gives both.
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Buttons (unchanged from the table above -- the XIAO's only three
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ADC/deep-sleep-capable pins, GPIO 0/1/2, are exactly the ones already
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used): next=GPIO2/**D2**, back=GPIO0/**D0**, menu/reset=GPIO1/**D1**.
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That leaves GPIO22/**D4** and GPIO23/**D5** free, e.g. for the optional
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VBUS mains-sense divider described under
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[Battery](#battery-optional-xiao-esp32-c6) below.
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`sdkconfig.xiao` also sets `FRAME_XIAO_ANTENNA_INIT=y`, which powers
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the XIAO's onboard RF switch and selects its ceramic antenna at boot
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(GPIO3/14, internal to the board -- not part of the wiring above).
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Without it, WiFi doesn't reliably work on this board at all: the radio
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comes up and logs look normal (e.g. the softAP starts and prints its
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SSID/password) but the switch's control pins are left floating, so
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nothing actually reaches the antenna -- the AP never becomes visible to
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a scan, and a station connection would fail to associate the same way.
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Seeed's own Arduino board package does this automatically; plain
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ESP-IDF (what this firmware uses) doesn't, hence the explicit init.
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A couple of things worth knowing if you pick different pins:
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- **Avoid the ESP32-C6's strapping pins** (GPIO 4, 5, 8, 9, 15) and the
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USB-JTAG pins (12, 13) where possible -- strapping pins are sampled at
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reset to select boot mode. The reference wiring above already uses
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GPIO9 for DC, which *is* a strapping pin; it's only sampled during
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power-on/reset, so it's safe once the app is running, but if
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flashing/boot ever misbehaves on your board, check whether the panel is
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pulling that line low during reset.
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- The panel's SPI interface is rated well above the firmware's default
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4MHz clock (`EPD_SPI_CLOCK_HZ`), but breadboard/dupont-wire connections
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are often unreliable much past a few MHz. Raise it once your physical
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wiring is confirmed solid.
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## Battery (optional, XIAO ESP32-C6)
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For a battery-powered build on the Seeed XIAO ESP32-C6 (which has
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BAT+/BAT- charge pads on its underside and charges over USB-C):
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- A 1S 3.7V LiPo **with an integrated protection circuit** (the board
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does no low-voltage cutoff of its own), soldered or JST-PH-pigtailed
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to the BAT pads. JST-PH polarity is not standardized -- verify with a
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multimeter before connecting.
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- Battery level sense: two equal-value resistors in series from BAT+ to
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GND (200k is the reference value, but any matched pair works -- it's
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a ratio divider, so what matters is the two resistors matching each
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other, not the absolute value; higher values just draw less constant
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current from the battery, e.g. ~10uA for 200k+200k vs ~2uA for
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1M+1M, at the cost of a slightly noisier ADC reading from the higher
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source impedance -- not noticeable in practice up to around 1M given
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how coarse the percent curve already is). Midpoint to GPIO0/A0
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(shared with the back button -- deliberate, see
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[`firmware/README.md`](../firmware/README.md#battery-xiao-esp32-c6)).
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- Optional mains detection: 2x100k divider from the 5V pin to GND,
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midpoint to a spare GPIO (e.g. 22).
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Both features are off by default in firmware
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(`FRAME_BATTERY_ADC_GPIO`/`FRAME_VBUS_SENSE_GPIO` = -1) -- except
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`FRAME_BATTERY_ADC_GPIO`, which [`firmware/sdkconfig.xiao`](../firmware/sdkconfig.xiao)
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turns on (GPIO0) by default for XIAO builds, since that's the one
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board this feature was designed for. Mains detection stays off by
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default even there; set `FRAME_VBUS_SENSE_GPIO` yourself if you wire
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that divider too.
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## Power
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The device spends nearly all its time in deep sleep, waking briefly once
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an hour (configurable, see the server's web UI) to fetch and display a
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photo. A full-color refresh on this panel takes 15-30+ seconds and draws
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more current than deep sleep by a wide margin -- expect battery life (if
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not running from USB power) to be dominated by refresh frequency, not
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sleep current.
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## Board identifiers
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Each board reports a name to the server (`X-Frame-Board`,
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`CONFIG_FRAME_BOARD_NAME`) that's chip-qualified rather than the plain
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`devkit`/`xiao` older firmware used -- `devkit_esp32c6`, `xiao_esp32c6`,
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`ee02` (see below). This changed once a second XIAO-based board (EE02,
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an ESP32-S3) existed and "xiao" alone stopped disambiguating hardware.
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The server keeps accepting the old bare names indefinitely, since
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already-flashed devices can't be retroactively renamed.
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## 13.3" Spectra 6 panel on Seeed's EE02 board (driver not yet functional)
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A second panel size is supported server-side (the web UI shows a
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read-only "Panel: 13.3\" Spectra 6" once a frame's device reports
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itself as `ee02`) but **the firmware driver for it does not work yet**
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-- `firmware/components/epd13in3e`'s panel init/LUT/refresh register
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sequence hasn't been ported from Waveshare's/Seeed's own reference code
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(which wasn't available at the time this was scaffolded), so a build for
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this board deliberately fails to compile (`#error`) rather than risk
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sending wrong register/LUT/timing values to real hardware. Confirmed so
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far, from Waveshare's/Seeed's public product pages and a community
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ESPHome integration (not an official vendor reference driver):
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- Panel: [Waveshare 13.3" e-Paper (E) Spectra 6](https://www.waveshare.com/13.3inch-e-paper-hat-plus-e.htm) --
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1600x1200, 270.40x202.80mm, same 6-ink Spectra family as the 7.3"
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panel. Full refresh ~19s.
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- Board: [Seeed's EE02](https://www.seeedstudio.com/XIAO-ePaper-DIY-Kit-EE02-for-13-3-Spectratm-6-E-Ink.html) --
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a XIAO ESP32-S3 Plus (16MB flash, 8MB PSRAM) socketed into a dedicated
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driver PCB, one reset + three user buttons, JST 2.0mm battery
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connector with built-in charging IC.
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- Wiring (source: [github.com/rkaramandi/esphome-seeed-ee02](https://github.com/rkaramandi/esphome-seeed-ee02), a community integration, not Seeed's own schematic --
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treat as a starting point, confirm before relying on it): unlike
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epd7in3e's single chip-select, this panel is driven as two halves
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sharing one CLK/MOSI/DC/RST/BUSY bus with independent chip-selects.
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| Signal | GPIO | Kconfig option |
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| --- | --- | --- |
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| CLK | 7 | `EPD_PIN_CLK` |
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| MOSI | 9 | `EPD_PIN_MOSI` |
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| CS (master half) | 44 | `EPD_PIN_CS_MASTER` |
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| CS (slave half) | 41 | `EPD_PIN_CS_SLAVE` |
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| DC | 10 | `EPD_PIN_DC` |
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| RST | 38 | `EPD_PIN_RST` |
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| BUSY | 4 | `EPD_PIN_BUSY` |
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| Panel power-enable | 43 | `EPD_PIN_POWER_EN` |
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User buttons are reportedly at GPIO 2/3/5, but which physical button
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maps to which logical role (next/back/menu) isn't confirmed, and the
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firmware's button Kconfig options (`FRAME_NEXT_BUTTON_GPIO` etc.,
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`firmware/main/Kconfig.projbuild`) still range-limit to GPIO 0-7 --
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the ESP32-C6's deep-sleep-wakeup-capable set, not yet verified against
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the ESP32-S3's. SPI clock is reportedly reliable only up to 2MHz on
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this panel/board (vs. epd7in3e's 4MHz default) -- see
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`firmware/sdkconfig.ee02`.
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See `firmware/components/epd13in3e/epd13in3e.c`'s own top comment for
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what's needed to actually make this board work.
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